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*参照元 [#ha514de6] #backlinks *説明 [#d8cea35f] -パス: [[linux-4.4.1/]] -パス: [[linux-4.4.1/arch/x86/mm/ioremap.c]] -FIXME: これは何？ --説明 **引数 [#d4023273] -phys_addr_t offset -- --[[linux-4.4.1/phys_addr_t]] -size_t size -- --[[linux-4.4.1/size_t]] **返り値 [#b40f55df] -void __iomem * -- **参考 [#vdad723e] *実装 [#z4119e08] /** * ioremap_nocache - map bus memory into CPU space * @phys_addr: bus address of the memory * @size: size of the resource to map * * ioremap_nocache performs a platform specific sequence of operations to * make bus memory CPU accessible via the readb/readw/readl/writeb/ * writew/writel functions and the other mmio helpers. The returned * address is not guaranteed to be usable directly as a virtual * address. * * This version of ioremap ensures that the memory is marked uncachable * on the CPU as well as honouring existing caching rules from things like * the PCI bus. Note that there are other caches and buffers on many * busses. In particular driver authors should read up on PCI writes * * It's useful if some control registers are in such an area and * write combining or read caching is not desirable: * * Must be freed with iounmap. */ void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size) { /* * Ideally, this should be: * pat_enabled() ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS; * * Till we fix all X drivers to use ioremap_wc(), we will use * UC MINUS. Drivers that are certain they need or can already * be converted over to strong UC can use ioremap_uc(). */ enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_MINUS; - --[[linux-4.4.1/page_cache_mode]] return __ioremap_caller(phys_addr, size, pcm, __builtin_return_address(0)); - --[[linux-4.4.1/__ioremap_caller()]] - --[[linux-4.4.1/__builtin_return_address()]] } EXPORT_SYMBOL(ioremap_nocache); - --[[linux-4.4.1/EXPORT_SYMBOL()]] *コメント [#gd94e20e]
